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layout: Make geom.rs logical geoemetry types more ergonomic (#32633)

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Make using the logical geometry types more ergonomic by having them all
implement `Copy` (at most 4 64-bit numbers), similar to what `euclid`
does. In addition add an implementation of `Neg` for `LogicalVec` and
`LogicalSides` as it will be used in upcoming table implementation code.
This commit is contained in:
Martin Robinson 2024-06-28 10:20:50 +02:00 • committed by GitHub
parent e9cf4d4971
commit adc0fc984d
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10 changed files with 80 additions and 102 deletions
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82
components/layout_2020/geom.rs
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@ -4,7 +4,7 @@
use std::convert::From;
use std::fmt;
use std::ops::{Add, AddAssign, Sub, SubAssign};
use std::ops::{Add, AddAssign, Neg, Sub, SubAssign};
use app_units::Au;
use serde::Serialize;
@ -32,13 +32,13 @@ pub struct LogicalVec2<T> {
pub block: T,
}
#[derive(Clone, Serialize)]
#[derive(Clone, Copy, Serialize)]
pub struct LogicalRect<T> {
pub start_corner: LogicalVec2<T>,
pub size: LogicalVec2<T>,
}
#[derive(Clone, Debug, Serialize)]
#[derive(Clone, Copy, Debug, Serialize)]
pub struct LogicalSides<T> {
pub inline_start: T,
pub inline_end: T,
@ -79,13 +79,9 @@ impl<T: Clone> LogicalVec2<T> {
}
}
impl<T> Add<&'_ LogicalVec2<T>> for &'_ LogicalVec2<T>
where
T: Add<Output = T> + Copy,
{
impl<T: Add<Output = T> + Copy> Add<LogicalVec2<T>> for LogicalVec2<T> {
type Output = LogicalVec2<T>;
fn add(self, other: &'_ LogicalVec2<T>) -> Self::Output {
fn add(self, other: Self) -> Self::Output {
LogicalVec2 {
inline: self.inline + other.inline,
block: self.block + other.block,
@ -93,13 +89,9 @@ where
}
}
impl<T> Sub<&'_ LogicalVec2<T>> for &'_ LogicalVec2<T>
where
T: Sub<Output = T> + Copy,
{
impl<T: Sub<Output = T> + Copy> Sub<LogicalVec2<T>> for LogicalVec2<T> {
type Output = LogicalVec2<T>;
fn sub(self, other: &'_ LogicalVec2<T>) -> Self::Output {
fn sub(self, other: Self) -> Self::Output {
LogicalVec2 {
inline: self.inline - other.inline,
block: self.block - other.block,
@ -107,41 +99,27 @@ where
}
}
impl<T> AddAssign<&'_ LogicalVec2<T>> for LogicalVec2<T>
where
T: AddAssign<T> + Copy,
{
fn add_assign(&mut self, other: &'_ LogicalVec2<T>) {
impl<T: AddAssign<T> + Copy> AddAssign<LogicalVec2<T>> for LogicalVec2<T> {
fn add_assign(&mut self, other: LogicalVec2<T>) {
self.inline += other.inline;
self.block += other.block;
}
}
impl<T> AddAssign<LogicalVec2<T>> for LogicalVec2<T>
where
T: AddAssign<T> + Copy,
{
fn add_assign(&mut self, other: LogicalVec2<T>) {
self.add_assign(&other);
}
}
impl<T> SubAssign<&'_ LogicalVec2<T>> for LogicalVec2<T>
where
T: SubAssign<T> + Copy,
{
fn sub_assign(&mut self, other: &'_ LogicalVec2<T>) {
impl<T: SubAssign<T> + Copy> SubAssign<LogicalVec2<T>> for LogicalVec2<T> {
fn sub_assign(&mut self, other: LogicalVec2<T>) {
self.inline -= other.inline;
self.block -= other.block;
}
}
impl<T> SubAssign<LogicalVec2<T>> for LogicalVec2<T>
where
T: SubAssign<T> + Copy,
{
fn sub_assign(&mut self, other: LogicalVec2<T>) {
self.sub_assign(&other);
impl<T: Neg<Output = T> + Copy> Neg for LogicalVec2<T> {
type Output = LogicalVec2<T>;
fn neg(self) -> Self::Output {
Self {
inline: -self.inline,
block: -self.block,
}
}
}
@ -352,10 +330,7 @@ impl<T> LogicalSides<T> {
}
}
impl<T> LogicalSides<T>
where
T: Copy,
{
impl<T: Copy> LogicalSides<T> {
pub fn start_offset(&self) -> LogicalVec2<T> {
LogicalVec2 {
inline: self.inline_start,
@ -382,13 +357,10 @@ impl<T: Clone> LogicalSides<AutoOr<T>> {
}
}
impl<T> Add<&'_ LogicalSides<T>> for &'_ LogicalSides<T>
where
T: Add<Output = T> + Copy,
{
impl<T: Add<Output = T> + Copy> Add<LogicalSides<T>> for LogicalSides<T> {
type Output = LogicalSides<T>;
fn add(self, other: &'_ LogicalSides<T>) -> Self::Output {
fn add(self, other: Self) -> Self::Output {
LogicalSides {
inline_start: self.inline_start + other.inline_start,
inline_end: self.inline_end + other.inline_end,
@ -398,6 +370,18 @@ where
}
}
impl<T: Neg<Output = T> + Copy> Neg for LogicalSides<T> {
type Output = LogicalSides<T>;
fn neg(self) -> Self::Output {
Self {
inline_start: -self.inline_start,
inline_end: -self.inline_end,
block_start: -self.block_start,
block_end: -self.block_end,
}
}
}
impl<T: Zero> LogicalSides<T> {
pub(crate) fn zero() -> LogicalSides<T> {
LogicalSides {