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Fix unit test compile error.

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Glenn Watson 2014-11-13 07:18:34 +10:00
parent d1b433a3b3
commit f823186345
1 changed files with 9 additions and 9 deletions
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18
components/util/logical_geometry.rs
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@ -968,15 +968,15 @@ impl<T: Add<T, T> + Sub<T, T>> Sub<LogicalMargin<T>, LogicalRect<T>> for Logical
fn modes() -> [WritingMode, ..10] { fn modes() -> [WritingMode, ..10] {
[ [
WritingMode::empty(), WritingMode::empty(),
FlagVertical, FLAG_VERTICAL,
FlagVertical | FlagVerticalLR, FLAG_VERTICAL | FLAG_VERTICAL_LR,
FlagVertical | FlagVerticalLR | FlagSidewaysLeft, FLAG_VERTICAL | FLAG_VERTICAL_LR | FLAG_SIDEWAYS_LEFT,
FlagVertical | FlagSidewaysLeft, FLAG_VERTICAL | FLAG_SIDEWAYS_LEFT,
FlagRTL, FLAG_RTL,
FlagVertical | FlagRTL, FLAG_VERTICAL | FLAG_RTL,
FlagVertical | FlagVerticalLR | FlagRTL, FLAG_VERTICAL | FLAG_VERTICAL_LR | FLAG_RTL,
FlagVertical | FlagVerticalLR | FlagSidewaysLeft | FlagRTL, FLAG_VERTICAL | FLAG_VERTICAL_LR | FLAG_SIDEWAYS_LEFT | FLAG_RTL,
FlagVertical | FlagSidewaysLeft | FlagRTL, FLAG_VERTICAL | FLAG_SIDEWAYS_LEFT | FLAG_RTL,
] ]
} }